74HC238; 74HCT238

General description

74HC238 and 74HCT238 are high-speed Si-gate CMOS devices and are pin compatible with Low-Power Schottky TTL (LSTTL).

The 74HC238/74HCT238 decoders accept three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active HIGH outputs (Y0 to Y7). The 74HC238/74HCT238 features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the "238" to a 1-to-32 (5 lines to 32 lines) decoder with just four "238" ICs and one inverter. The "238" can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state.

The 74HC238/74HCT238 is similar to the 74HC138/74HCT138 but has non-inverting outputs.

Features

• Demultiplexing capability
• Multiple input enable for easy expansion
• Ideal for memory chip select decoding
• Active HIGH mutually exclusive outputs
• Multiple package options
• Complies with JEDEC standard no. 7A
• ESD protection:
  • HBM JESD22-A114E exceeds 2000 V
  • MM JESD22-A115-A exceeds 200 V
• Specified from -40 Cel to +85 Cel and from -40 Cel to +125 Cel

Products/packages

Pricing/ordering/availability

Block diagrams/pinning

Design support

Support Documents

HCT_USER_GUIDE; HC/T User Guide (1997-11-01)

Parametrics/similar products

Similar products
74HC238; 74HCT238 links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.

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